lohi
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Posts posted by lohi
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warning I don't know c++ & asm , only some simple c.
since two days I'm searching about that topology thing. I think I found two things:
I tried changing kernel using kernel 3.16
-> sameI tried changing microcode, removed packages so it's using default builtin microcode
-> same
I tried doing a independent cpuid test code with c, using 0ad __cpuidex (second one)
found result are wrong with eax 1 & 4multiple sources are saying it should be another method with recent processors
I tried using method with eax 0xB
results are ok core & logicalI tried adding eax 0xB method to 0ad topology.cpp
results are wrong core & logical
running multiple times the same 0ad while trying things I noticed in fact cpuid id results are anytime same in ebx with any input, per run. this is only with 0ad not the independent code, despite its basically the same code block.something that style:
run 1 binaries/system/pyrogenesis
core 4 output regs: eax:1c004121 ebx:00c25000 ecx:0000003f edx:00000000
core 4 eax 26,31 +1:00000008
core B output regs: eax:00000004 ebx:00c25000 ecx:00000201 edx:00000004
core B ebx 0,15:00005000
log 1 output regs: eax:000306c3 ebx:00c25000 ecx:7ffafbff edx:bfebfbff
log 1 ebx 16,23:000000c2
log B output regs: eax:00000001 ebx:00c25000 ecx:00000100 edx:00000004
log B ebx 0,15:00005000
maxCoresPerPackage:20480
maxLogicalPerCore:20480
logicalPerPackage:419430400run2 binaries/system/pyrogenesis
core 4 output regs: eax:1c004121 ebx:00b92000 ecx:0000003f edx:00000000
core 4 eax 26,31 +1:00000008
core B output regs: eax:00000004 ebx:00b92000 ecx:00000201 edx:00000000
core B ebx 0,15:00002000
log 1 output regs: eax:000306c3 ebx:00b92000 ecx:7ffafbff edx:bfebfbff
log 1 ebx 16,23:000000b9
log B output regs: eax:00000001 ebx:00b92000 ecx:00000100 edx:00000000
log B ebx 0,15:00002000
maxCoresPerPackage:8192
maxLogicalPerCore:8192
logicalPerPackage:67108864run3 binaries/system/pyrogenesis
core 4 output regs: eax:1c004121 ebx:00c18000 ecx:0000003f edx:00000000
core 4 eax 26,31 +1:00000008
core B output regs: eax:00000004 ebx:00c18000 ecx:00000201 edx:00000002
core B ebx 0,15:00008000
log 1 output regs: eax:000306c3 ebx:00c18000 ecx:7ffafbff edx:bfebfbff
log 1 ebx 16,23:000000c1
log B output regs: eax:00000001 ebx:00c18000 ecx:00000100 edx:00000002
log B ebx 0,15:00008000
maxCoresPerPackage:32768
maxLogicalPerCore:32768
logicalPerPackage:1073741824
I tried searching about it yet I couldn't find anything on the net about cpuid results being same with any eax command
I searched again 0ad code I found the first __cpuidex asm code does move and pop ebx
I tried removing that asm so only the second one is usedrunning 0ad results are ok core & logical
ebx is remaining slightly another with eax 1&4 it's the current apic processor its running on
with method eax 0xb its in edxcore 4 output regs: eax:1c004121 ebx:01c0003f ecx:0000003f edx:00000000
core 4 eax 26,31 +1:00000008
core B output regs: eax:00000004 ebx:00000004 ecx:00000201 edx:00000000
core B ebx 0,15:00000004
log 1 output regs: eax:000306c3 ebx:00100800 ecx:7ffafbff edx:bfebfbff
log 1 ebx 16,23:00000010
log B output regs: eax:00000001 ebx:00000001 ecx:00000100 edx:00000000
log B ebx 0,15:00000001
maxCoresPerPackage:4
maxLogicalPerCore:1
logicalPerPackage:4
core 4 output regs: eax:1c004121 ebx:01c0003f ecx:0000003f edx:00000000
core 4 eax 26,31 +1:00000008
core B output regs: eax:00000004 ebx:00000004 ecx:00000201 edx:00000002
core B ebx 0,15:00000004
log 1 output regs: eax:000306c3 ebx:02100800 ecx:7ffafbff edx:bfebfbff
log 1 ebx 16,23:00000010
log B output regs: eax:00000001 ebx:00000001 ecx:00000100 edx:00000002
log B ebx 0,15:00000001
maxCoresPerPackage:4
maxLogicalPerCore:1
logicalPerPackage:4
I don't know about that ifdef catch
# if defined(__i386__) && defined(__PIC__)gcc itself is having cpuid functions, they are without any PIC defines conditions
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/i386/cpuid.h
attached are modified topology.cpp & x86_x64.cpp
supposed being in 0ad-0.0.23-alpha/source/lib/sysdep/arch/x86_x64/
thanks
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hi,
I tried compiling 0.23 on a 32bits linuxfirst attempt crashes on topology.cpp line 105, as there are already few other reports on this forum: here or there.workaround Posted May 12, 2017 also work here, can be something as:
//ENSURE(logicalPerPackage % maxCoresPerPackage == 0);
const size_t maxLogicalPerCore = logicalPerPackage / maxCoresPerPackage;
//return maxLogicalPerCore;
return 1;now game runs well.
puzzling is in the crashlog.txt the cpu line was
CPU : i686, Intel Core i5-4590T @ 2.00GHz (1x4x1), 2.00 GHz
now it run fine I can see the syslog cpu line is the same:
CPU : i686, Intel Core i5-4590T @ 2.00GHz (1x4x1), 2.00 GHz
Later I searched about it , thought some report would be some use.
despite intel says proc is without hyperthread:
https://ark.intel.com/products/78928/Intel-Core-i5-4590T-Processor-6M-Cache-up-to-3_00-GHz
tools I have and kernel are reporting hyperthread cap:
[root] lscpu | grep "Model name"
Model name: Intel(R) Core(TM) i5-4590T CPU @ 2.00GHz[root] lscpu | grep "Thread"
Thread(s) per core: 1
[root] cpuid | grep hyper-thread
hyper-threading / multi-core supported = true
cpuid result sample :
x2APIC features / processor topology (0xb):
--- level 0 (thread) ---
bits to shift APIC ID to get next = 0x1 (1)
logical processors at this level = 0x1 (1)
level number = 0x0 (0)
level type = thread (1)
extended APIC ID = 6
--- level 1 (core) ---
bits to shift APIC ID to get next = 0x4 (4)
logical processors at this level = 0x4 (4)
level number = 0x1 (1)
level type = core (2)
extended APIC ID = 6[root] dmidecode | grep thread
HTT (Multi-threading)others seem also having similar concern with other cpu:
https://news.ycombinator.com/item?id=14630357
edit:
I tried retrieving 0ad topology.cpp findings, adding some printf it reports
maxCoresPerPackage:8
logicalPerPackage:190instead of 4 & 4
thanks
crash on topology.cpp
in Bug reports
Posted
5.1.5. Executables are now compiled as position independent executables (PIE) by default
By default, the GNU GCC 6 compiler provided by Debian stretch will compile all executables as position independent. This provides a mitigation for an entire class of vulnerabilities.